Thesis Defense – Amer M. N. Dyab (MSEE)

Amer Mohammad Nayef Dyab – M.Sc. in Electrical Engineering

Prof. H. Fatih Uğurdağ – Advisor

Date: 27/12/2024

Time: 14:00

Location: AB1 414

“DESIGNING CUSTOM RISC-V BASED SOCS: FROM INTEGRATION TO ISA OPTIMIZATION”

Prof. H. Fatih Uğurdağ, Özyeğin University

Assoc. Prof. Cenk Demiroğlu, Özyeğin University

Asst. Prof. Onur Demir, Yeditepe University

Abstract:

Soft processor cores, particularly open-source processor architectures like the RISC-V, have extended the diversity and flexibility of SoC designs, tailoring the hardware design to the software needs, instead of the opposite. These developments enable unprecedented flexibility in both hardware and software aspects, motivating the exploration of creating highly-customizable SoC integrations that can adapt to a diverse range of application requirements. The first part of this thesis begins by implementing the concept of a flexible and customizable SoC prototype, the ”OzU SoC”, tailored to the meet requirements of an electric metering application. The philosophy of this development work is to quickly adapt the design to its specific application needs, rather than relying solely on software optimizations on general-purpose designs. This effort culminates in implementing a prototype of the OzU SoC as a soft Intellectual Property (IP) demonstrated on a Field Programmable Gate Array (FPGA). The second part of this thesis focuses on optimizing a key challenge in modern SoC design: physical area reduction. On-chip memory, a sig- nificant factor in determining the size of modern SoC design, is the main interest. In this part, the Novel Variable-Length Inclusive Instruction Set Architecture (NOVLI-ISA) is proposed as a compatible extension to the 32-bit base integer RISC-V ISA, known as RV32I. This part includes the design, implementation, and evaluation of the proposal, with the primary goal of machine code size reduction without compromising complexity, functionality, or flexibility. This thesis demonstrates key aspects of modern customizable SoC development, contributing to the RISC-V community with the proposed extension

Bio:

Amer Dyab joined the Electrical Engineering Department at Özyeğin University (OzU) in February 2022 as a MSc student and Research and Teaching Assistant. Initially started in the field of power electronics, he later transitioned to semiconductors. He earned his BSc degree in Computer Engineering from the University of Jordan (JU) in Amman, Jordan, in 2019. With over eight years of combined professional and academic experience in electronics and computer engineering, Amer has specialized in hardware research and development, particularly in Printed Circuit Boards (PCB) and embedded systems. His expertise in these areas has been instrumental in mentoring junior engineers at OzU, where he is well-regarded for his role in supervising senior undergraduate projects. As a research assistant at OzU, Amer has contributed two publications. His first, co-authored with his former advisor, Dr. Hamza Makhamreh, explored advancements in Model Predictive Control (MPC). His second publication, under the guidance of his current advisor, Prof. H. Fatih Uğurdağ, focused on the NOVLI-ISA part of his thesis, providing a contribution to the RISC-V community.

1) A. Dyab and H. F. Ugurdag, "NOVLI-ISA: A Novel Optimized Variable-Length

Inclusive Instruction Set Architecture for RV32I/E Architecture," 20th East-West Design and Test Symposium (EWDTS), Yerevan, Armenia, 2024, Presented and to be Published

2) H. Makhamreh and A. Dyab, "Weighting Factor-Free Model Predictive Control for Three-Level Buck Converters," 5th Global Power, Energy and Communication Conference (GPECOM), Nevsehir, Turkiye, 2023, pp. 81-85, doi: 10.1109/GPECOM58364.2023.10175673.